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Supercomputing Review, Fall 1988 Glossy Issue
Supercomputing Review was for a while the major commercial publication in HPC, a field dominated by academic and professional journals. This edition was published just in advance of the first Supercomputing Conference in 1988. It has since been…
Tags: SCArchiv_1988
Cray-2 - Floating Point Module
The Cray-2 cpu followed in the footsteps of its predecessors and excelled at floating point arithmetic, but its true strength was that it supported more memory than any other machine available at the time. It is claimed that the first real Cray-2…
Tags: SCArchiv_1988
Cray-2 - CPU Module
The Cray-2 was revolutionary both for its circuit packaging and its cooling system. Circuit boards were stacked vertically and connected by "Z-pins" that ran up the center of the stack. The density of this packaging necessitated immersion cooling,…
Tags: SCArchiv_1988
Cray Y-MP - Memory Board
The Y-MP is claimed to have been the first supercomputer to sustain over 1 gigaflop in application execution. An "M" model was equipped with slower but smaller DRAM that allowed it to house up to 32 GB of…
Tags: SCArchiv_1988
Cray X-MP Processor Board
The X-MP system was Cray's first multi-processor system. It had shared memory and a small number of typical Cray vector processors. This is one of about 90 boards that made up a single processor. Later versions of this machine had four processors…
Tags: SCArchiv_1988
Cray LTSS - Pocket Guide
This is an abbreviated guide to the user terminal commands of the Livermore Time Sharing System, which ran on the Cray computers at the National Magnetic Fusion Computing Center (NMFECC, later to become NERSC) until the advent of UNICOS, the Cray…
Tags: SCArchiv_1988
Cray CTSS - Pocket Guide
This is an abbreviated guide to the user terminal commands of the Cray Time Sharing System, which was based on LTSS and ran on Cray computers until the advent of UNICOS, the Cray version of…
Tags: SCArchiv_1988
Cray Y-MP CPU Board
The Y-MP was the successor to the X-MP. It could have up to eight vector processors, and the address range registers were 32 bits…
Tags: SCArchiv_1988
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